Digital Signal Processing Reference
In-Depth Information
3 Programmable Logic Technology
A wide spectrum of devices is available for the implementation of digital logic
designs as shown in Figure 3.1. Older traditional off-the-shelf integrated circuit
chips, such as SSI and MSI TTL, performed a fixed operation defined by the
device manufacturer. A user must connect a number of different chip types to
build even a simple logic circuit with this older technology. A large number of
chips will also be required as each chip contains only a few basic logic gates.
Application specific integrated circuits (ASICs), complex programmable logic
devices (CPLDs), and field programmable gate arrays (FPGAs) are integrated
circuits whose internal functional operation is defined by the user. ASICs
require a final customized manufacturing step for the user-defined function. A
CPLD or FPGA requires user programming to perform the desired operation.
Digita l
Logic
Standard
Logic
Progammable
Logic (FPLDs)
Full
Cu stom
ASICs
Microproce sso r
& RAM
TTL
74xx
CMOS
4xxx
PLDs
FPGAs
CPLDs
Gate
Arrays
Standard
Cell
Figure 3.1
Digital logic technologies
.
The design tradeoffs of the different technologies are seen in Figure 3.2. Full
custom VLSI development of a design at the transistor level can require several
years of engineering effort for design and testing. Such an expensive
development effort is warranted only for the highest volume devices. This
approach can generate the highest performance devices. Examples of full
custom devices include the microprocessor and RAM chips used in PCs.
ASICs can be divided into three categories, Gate Arrays, Standard Cell and
Structured. Gate Arrays are built from arrays of pre-manufactured logic cells. A
single logic cell can implement a few gates or a flip-flop. A final manufacturing
step is required to interconnect the sea of logic cells on a gate array. This
interconnection pattern is created by the user to implement a particular design.
Standard Cell devices contain no fixed internal structure. For standard cell
devices, the manufacturer creates a custom photographic mask to build the chip
based on the user's selection of devices, such as controllers, ALUs, RAM,
ROM, and microprocessors from the manufacturer's standard cell library. New
Structured ASICs are similar to gate arrays but each array element contains
more logic. They offer tradeoffs somewhere between other ASICs and FPGAs.
