Digital Signal Processing Reference
In-Depth Information
VGA
Vi de o Por t
RS232
Por t
USB
Bla ster
Por t
Mic
In
Line
In
Line
Out
7.5V DC Power
Su ppl y
Conn ector
PS/2 Por t
Power
ON/ OFF
Switch
24bit Audio CODEC
Ocilla tors
2 7Mhz 5 0MHz 24M hz
Altera USB
Blaster
Controller
Ch ip s et
Altera EPCS 16
Co nfi gu rat io n D ev i c e
90nm
Cyclone II
FP GA wi t h
20K LEs
RUN/PROG
Switch fo r
JTAG/AS
Mo des
8MB SDRAM
SD Card Socket
4MB Flash
Me mor y
512 KB SRAM
7SEG Display Module
8 Gr een LEDs
10 Red LEDs
SMA
Exte rn al
Clock
4 Pu shb utto n Swi tches
10 Togg le Swi tch es
Figure 2.2
The Altera DE1 board's I/O features.
2.1 FPGA and External Hardware Features
On each of the boards, the FPGA is the large square chip located near the center
of the development board. Locate the FPGA chip on the DE1 board as seen in
Figures 2.1 and 2.2. Each of the various board's FPGAs has a different array of
features. These are summarized for the different boards in Table 2.1. Each
FPGA has a different number of logic elements (LE) that are used to implement
user logic. They also contain varying amounts of both internal embedded
memory blocks and the newer boards also have external memory.
FPGAs such as the Cyclone II found on the DE1 and DE2 boards are designed
to support Digital Signal Processing (DSP) applications, so they also contain
hardware integer multipliers.
On larger FPGAs, phase locked loops (PLLs) are used to divide, multiply, and
shift the phase of clock signals. Remember that you must always compile your
design for the correct board's FPGA device and pin assignments or it will not
download to the device and operate correctly.
