Digital Signal Processing Reference
In-Depth Information
An illustration of the Nios II Command Shell after the complete sequence of
commands have executed is shown in Figure 18.5. When the kernel image
download is complete, the processor will immediately begin executing at
memory address 0x00D00000. µClinux will start booting immediately and the
series of messages shown in Figure 18.6 should appear in your terminal
window. (Some messages will vary for the DE1 board because device drivers
for peripherals not available on the DE1 board will not load.)
/cygdrive/c/altera/71/nios2eds/examples
[SOPC Builder]$
cd c:
/cygdrive/c
[SOPC Builder]$
cd altera/qdesigns/rpds18/complete/
/cygdrive/c/altera/qdesigns/rpds18/complete
[SOPC Builder]$
nios2-configure-sof rpds18.sof
Searching for SOF file:
in .
rpds18.sof
Info:
*******************************************************************
Info: Running Quartus II Programmer
Info: Command: quartus_pgm --no_banner --mode=jtag -o p;rpds18.sof
Info: Using programming cable "USB-Blaster [USB-0]"
Info: Started Programmer operation at Wed Aug 01 14:11:26 2007
Info: Configuring device index 1
Info: Device 1 contains JTAG ID code 0x020B40DD
Info: Configuration succeeded -- 1 device(s) configured
Info: Successfully performed operation(s)
Info: Ended Programmer operation at Wed Aug 01 14:11:28 2007
Info: Quartus II Programmer was successful. 0 errors, 0 warnings
Info: Allocated 51 megabytes of memory during processing
Info: Processing ended: Wed Aug 01 14:11:28 2007
Info: Elapsed time: 00:00:09
/cygdrive/c/altera/qdesigns/rpds18/complete
[SOPC Builder]$
nios2-download -g zImage
Using cable "USB-Blaster [USB-0]", device 1, instance 0x00
Pausing target processor: OK
Initializing CPU cache (if present)
OK
Downloaded 1775KB in 22.6s (78.5KB/s)
Verified OK
Starting processor at address 0x00D00000
/cygdrive/c/altera/qdesigns/rpds18/complete
[SOPC Builder]$
Figure 18.5
The sequence of commands and output that appear when programming the FPGA via the
Nios II Command Shell is shown here.
