Digital Signal Processing Reference
In-Depth Information
Figure 17.3
Specifying the name of the Nios II processor for your system.
In the
Create New System
dialog box, enter the name
nios32
, and set the
Ta r g e t H D L
to
VHDL
as shown in Figure 17.3. Click
OK
to open SOPC
Builder with a blank project titled nios32.
The system settings in the top part of SOPC Builder window must be set for the
board and device that you are using. For the DE boards, the on-board clock
circuit generates several clock frequencies, including 24 MHz, 27 MHz, and
50 MHz. For this tutorial, the 50 MHz clock signal will be used; therefore,
enter
50.0
in the
clk
field. Select
Cyclone II
as
Device Family
. When these
settings have been entered, your SOPC Builder window should look similar to
the screen shot in Figure 17.4.
I
T IS CRITICAL THAT THE FREQUENCY SELECTED IN THE
SOPC
B
UILDER IS THE ACTUAL
CLOCK RATE USED IN YOUR HARDWARE DESIGN
.
IF A
PLL
IS USED TO GENERATE A DIFFERENT
N
IOS
II
CLOCK SIGNAL
,
THEN THAT CLOCK FREQUENCY MUST BE ENTERED INTO THE
SOPC
B
UILDER BEFORE THE SYSTEM IS GENERATED
.
I
F YOU MODIFY THE CLOCK FREQUENCY FOR
THE
N
IOS
II
PROCESSOR LATER
,
THEN YOU MUST RE
-
GENERATE THE
N
IOS
II
PROCESSOR WITH
THE UPDATED FREQUENCY SPECIFIED HERE
.
Take a minute to familiarize yourself with the layout of the SOPC Builder
window. Along the left-hand side, there is an expandable list of components
organized by category that can be added to a Nios II system. Click on the “+”
symbol next to the items in this list to expand the list of components for each
category. If board support packages have been installed, then those
development boards will be listed as an item. Expanding these items will reveal
components that are specific to these boards. If you installed the design files as
discussed in Section 17.1, then the
University Program DE1 Board
and
University Program DE2 Board
categories will appear.
