Digital Signal Processing Reference
In-Depth Information
14.7 The Execute Stage
The execute stage of the MIPS shown in Figure 14.7 contains the data ALU and
a branch address adder used for PC-relative branch instructions. Multiplexers
that select different data for the ALU input are also in this stage.
PC+4
AD D
ADD
Result
Shift
Left
2
Sign
Extend
Read
Data
1
Zero
ALU
ALU
Result
Read
Data
0
2
x
Sign
Extend
1
ALUSrc
ALU
Control
ALUOP
Figure 14.7
Block Diagram of MIPS Execute Unit.
-- Execute module (implements the data ALU and Branch Address Adder
-- for the MIPS computer)
LIBRARY
IEEE
;
USE
IEEE
.
STD_LOGIC_1164
.
ALL
;
USE
IEEE
.STD_LOGIC_ARITH.
ALL
;
USE
IEEE
.STD_LOGIC_SIGNED.
ALL
;
ENTITY
Execute
IS
PORT
( Read_data_1
:
IN
STD_LOGIC_VECTOR
( 31
DOWNTO
0 );
Read_data_2
:
IN
STD_LOGIC_VECTOR
( 31
DOWNTO
0 );
Sign_extend
:
IN
STD_LOGIC_VECTOR
( 31
DOWNTO
0 );
Function_opcode :
IN
STD_LOGIC_VECTOR
( 5
DOWNTO
0 );
UOp
:
IN
STD_LOGIC_VECTOR
( 1
DOWNTO
0 );
r c
:
IN
STD_LOGIC
;
r o
:
OUT
STD_LOGIC
;
l t
:
OUT
STD_LOGIC_VECTOR
( 31
DOWNTO
0 );
l t
:
OUT
STD_LOGIC_VECTOR
( 7
DOWNTO
0 );
PC_plus_4
:
IN
STD_LOGIC_VECTOR
( 7
DOWNTO
0 );
:
IN
STD_LOGIC
);
clock, reset
END
Execute;
