Digital Signal Processing Reference
In-Depth Information
ASCII “P” = 0x50
00001010
Mark (1)
Space (0)
Start
Bit
01234567 t p
Bit
Data Bit number
MSB
LSB
Time
Figure 12.2
RS-232C Serial interface transmission of an 8-bit data value
Figure 12.2 shows the transmission of a single ASCII character over an RS-
232C serial interface. The serial bit has two states. Mark is the high state (>3V)
and Space is the low state (<-3V). Older generation serial devices will have
around +12V and -12V levels for Mark and Space. Note that for the proper RS-
232 voltage levels, a standard digital logic output bit will have to have its
voltage levels converted for use in a serial interface. Special ICs are normally
used for this RS-232C voltage conversion. To reduce the need for additional
circuits, these ICs also generate the required DC supply voltages from the
standard digital logic DC power supplies. This special IC chip is already
present on the UP3's serial interface. FPGA logic elements can be used to build
the UART hardware function.
The idle state is High (Mark). Whenever the interface starts sending a new 8-bit
data value, the line is dropped Low (Space) for one clock cycle (baud rate
clock). This is called the start bit. The eight data bits are then clocked out
during the next eight baud clocks in low to high bit order. The highest data bit
is sometimes used as a parity bit for error detection, when only seven data bits
are used instead of eight. After the data bits are clocked out, the bit goes high
for one clock. This is called the Stop bit. Sometimes at low baud rates, two
Stop bits are present. Note that at least 10 clocks are required to transfer an 8-
bit data value.
Typically, UARTs transfer 8-bit data values in and out to other internal logic
using an 8-bit parallel I/O port interfaced to a processor. Extra UART status
bits can be read by the processor that indicate another 8-bit data value can be
sent to the UART or another 8-bit data value is available to read in from the
UART. Since serial transmission is very slow compared to a processor's clock,
these status bits must be checked in software or hardware for their proper state
or the processor will send/receive data faster than the UART can produce or
consume it. Other status bits can also be used to detect various error conditions.
