Digital Signal Processing Reference
In-Depth Information
begin
state = fetch;
end
endcase
end
// Make these assignments immediately during current state (i.e., unregistered)
always
@(state or program_counter or instruction_register)
begin
case
(state)
reset_pc:
memory_address_register = 8'h 00;
fetch:
memory_address_register = program_counter;
decode:
memory_address_register = instruction_register[7:0];
execute_add:
memory_address_register = program_counter;
execute_store: memory_address_register = instruction_register[7:0];
execute_store2: memory_address_register = program_counter;
execute_load:
memory_address_register = program_counter;
execute_jump: memory_address_register = instruction_register[7:0];
default
:
memory_address_register = program_counter;
endcase
case
(state)
execute_store: memory_write = 1'b 1;
default
:
memory_write = 1'b 0;
endcase
end
endmodule
Figure 9.12
Verilog Model of ΜP 3 Computer.
DEPTH
= 256;
% Memory depth and width are required
%
WIDTH
= 16;
% Enter a decimal number
%
ADDRESS_RADIX
= HEX;
% Address and value radixes are optional
%
DATA_RADIX
= HEX;
% Enter BIN, DEC, HEX, or OCT; unless
%
% otherwise specified, radixes = HEX
%
-- Specify values for addresses, which can be single address or range
CONTENT
BEGIN
[00..FF] :
0000;
% Range--Every address from 00 to FF = 0000 (Default) %
00
:
0210;
% LOAD AC with MEM(10) %
01
:
0011;
% ADD MEM(11) to AC %
02
:
0112;
% STORE AC in MEM(12) %
03
:
0212;
% LOAD AC with MEM(12) check for new value of FFFF %
04
:
0304;
% JUMP to 04 (loop forever) %
10
:
AAAA;
% Data Value of B %
11
:
5555;
% Data Value of C%
12
:
0000;
% Data Value of A - should be FFFF after running program %
END
;
Figure 9.13
Progam.mif file containg ΜP 3 Computer Program and DATA.
