Using VHDL for Synthesis of Digital Hardware - Rapid Prototyping of Digital Systems - page 107

bit can be set to '0' or '1' using single quotes. A standard logic vector constant,
such as the 2-bit zero value, "00" must be enclosed in double quotes. X”F” is
the four bit hexadecimal value F.

6.2 VHDL Operators
Table 6.1 lists the VHDL operators and their common function in VHDL
synthesis tools.

Table 6.1 VHDL Operators.

VHDL Operator Operation

+ Addition

Subtraction

* Multiplication*

/ Division*

MOD Modulus*

REM Remainder*

& Concatenation - used to combine bits

SLL** logical shift left

SRL** logical shift right

SLA** arithmetic shift left

SRA** arithmetic shift right

ROL** rotate left

ROR** rotate right

= equality

/= Inequality

< less than

<= less than or equal

> greater than

>= greater than or equal

NOT logical NOT

AND logical AND

OR logical OR

NAND logical NAND

NOR logical NOR

XOR logical XOR

XNOR* logical XNOR

*Not supported in many VHDL synthesis tools. In the Quartus II tools, only
multiply and divide by integers are supported. Mod and Rem are not
supported in Quartus II. Efficient design of multiply or divide hardware may
require the user to specify the arithmetic algorithm and design in VHDL.
** Supported only in 1076-1993 VHDL only.

Table 6.2 illustrates two useful VHDL conversion functions for type STD_LOGIC
and integer.