Physical Fault Models and Fault Tolerance - Models in Hardware Testing - page 236

Fig. 8.12 Principle of
pin-forcing fault injection

Fig. 8.13 Application of electromagnetic interferences

It is noteworthy that the pins of the ICs connected, by means of an equipotential
line, to an injected pin are faulted as well. Accordingly, to simplify the accessibility
to the pins of the microprocessor, the target ICs were mainly the buffer ICs directly
connected to it. The supported fault models include temporary stuck-at faults affect-
ing single or multiple pins. Indeed, temporary faults injected on the pins of the ICs
can simulate the consequences of internal faults on the pins of the faulted IC(s).

8.3.2.3 Electromagnetic Interferences

Electromagnetic interferences (EI) are common disturbances in automotive vehi-
cles, trains, airplanes, or industrial plants. Such a technique is widely used to stress
digital equipment.
These experiments were carried out at the Vienna University of Technology, Aus-
tria. Thanks to the use of a commercial burst generator this technique is easy to
implement.
Two different forms of application of this technique were considered (Fig. 8.13 ) .
In the first form, the single computer board of the target MARS node (see Section
8.3.4.1) was mounted between two metal plates connected to the burst generator. In
this way, the entire node was affected by the generated bursts.
Because the Ethernet transceivers turned out to be more sensitive to the bursts
than the node under test itself, a second configuration was set up, which used a
special probe that was directly placed on top of the target circuit. In this way the
generated bursts affected only the target circuit (and some other circuits located
near the probe).