Physical Fault Models and Fault Tolerance - Models in Hardware Testing - page 228

8.2.5.1 Implementation Rules for Detecting Single Errors

For detection techniques targeting single errors, the main functional constraint
is that the various outputs of the circuit should be produced by independent circuits
(slices), i.e., circuits that have no common link except possibly input connections.
Such a constraint enables the detection of all the faults that induce single errors,
only.
A set of implementation rules enables the detection of opens of interconnections
or of supply lines that can produce unidirectional errors when they are shared by
more than one output. These rules concern the delivery of a common signal to sev-
eral slices (common variables, power supplies).
They can be summarized as follows:
R1 0 : Check the signal;

R2 0 : Distribute the signal in such a way that an open only affects one slice or if

it affects more than one slice it affects also the checker (no supply to the
checker means that the two outputs are at the same value which corresponds
to the detection of an error).

In Fig 8.9 , we illustrate the two main alternatives. Figure 8.9 a depicts the use of a
splitting node and Fig. 8.9 b describes the use of a main line with the checker located
at the physical end of this line. In the latter case, the divergences are only allowed if
they supply several gates inside the same slice.

a

towards the
different slices

common input
or power supply

towards
the checker

Splitting node.

b

slice

C

common
input

S 1
S 2

S n

C

C

power supply

Fig. 8.9 Main alternatives
for single errors ( a ) splitting
node. ( b ) checkers located at
the end of the lines.

C :

: forbidden connections

checker

Checkers located at the end of the lines.