Models for Power-Aware Testing - Models in Hardware Testing - page 202

Golomb codes can be found in Wang et al. ( 2006 ). Golomb coding efficiently com-
presses test data, and the filling of all don't cares with 0 reduces the number of
transitions during scan-in, thus significantly reducing shift power. One limitation is
that it is very inefficient for runs of 1's. In fact, the test storage can even increase for
test cubes that have many runs of 1's. Moreover, implementing this test compression
scheme requires a synchronization signal between the ATE and the CUT as the size
of the codeword is of variable length.
To address the above limitations, an alternating run-length coding scheme was
proposed in Chandra and Chakrabarty ( 2002 ). While a Golomb coding only encodes
runs of 0's, an alternating run-length code can encode both runs of 0's and runs of
1's. The remaining issue in this case is that the coding becomes inefficient when a
pattern with short runs of 0's or 1's has to be encoded. Another technique based on
Golomb coding is proposed in Rosinger et al. ( 2001 ) but uses a MT filling of all
don't care bits rather than a 0-filling at the beginning of the process. The Golomb
coding is then used to encode runs of 0's, and a modified encoding is further used
to reduce the size of the codeword.

7.6.1.2 Linear-Decompression-Based Schemes

Linear decompressors are made of XOR gates and flip-flops (see Wang et al. ( 2006 )
for a comprehensive description) and can be used to expand data coming from the
tester to fed the scan chains during test application.
When combined with LFSR reseeding, linear decompression can be view as an
efficient solution to reduce data volume and bandwidth. The basic idea in LFSR
reseeding is to generate deterministic test cubes by expanding seeds. Given a deter-
ministic test cube, a corresponding seed can be computed by solving a set of linear
equations - one for each specified bit - based on the feedback polynomial of the
LFSR. Since typically 1% to 5% of the bits in a test cube are care bits, the size
of the corresponding seed (stored in the tester memory) will be very low (much
smaller than the size of the test cube). Consequently, reseeding can significantly
reduce test data volume and bandwidth. Unfortunately, it is not as good for power
consumption because the don't care bits in each expanded test cube are filled with
pseudo-random values thereby resulting in excessive switching activity during scan
shifting. To solve this problem, Lee and Touba ( 2004 ) takes advantage of the fact
that the number of transitions in a test cube is always less than its number of spec-
ified bits. A transition in a test cube is defined as a specified 0 (1) followed by a
specified 1 (0) with possible X's between them, e.g., X10XXX or XX0X1X. Thus,
rather than using reseeding to directly encode the specified bits as in conventional
LFSR reseeding, the proposed encoding scheme divides each test cube into blocks
and only uses reseeding to encode blocks that contain transitions. Other blocks are
replaced by a constant value which is fed directly into scan chains at the expense of
extra hardware.
Unlike reseeding-based compression schemes, the solution proposed in Czysz
et al. ( 2007 ) uses the Embedded Deterministic Test (EDT) environment ( Rajski