Hardware Reference
In-Depth Information
objectives (maximum fault coverage and minimum pattern length with reasonable
run time). An example is given in Wang and Gupta ( 1994 ) where the path-oriented
decision-making (PODEM) algorithm is modified so that don't care bits are maxi-
mized and are then assigned in a clever manner to minimize the number of flip-flop
transitions between two consecutive test patterns. This solution reduces both average
and peak power dissipation during scan shift operations. Another example is given
in We n e t a l . ( 2006 a ) where the PODEM algorithm is modified for efficient capture
power reduction during scan testing. The primary objective of the modified algo-
rithm is the detection of targeted faults and the secondary one is the minimization of
the difference between before-capture and after-capture output values of scan cells.
This is achieved by introducing the concept of a capture conflict (C-conflict) in ad-
dition to the conventional detection conflict (D-conflict). A C-conflict occurs when
a difference between the before-capture and after-capture output values of a scan
cell is created by logic value assignment during ATPG. A C-conflict, in the same
manner as a D-conflict, may be avoided through the backtrack operation. However,
backtracking for a C-conflict may make fault detection impossible. In this case, the
backtracking for the C-conflict is reversed, and the transition at the scan cell is tol-
erated since the primary goal is fault detection.
7.4.1.2
Power-Constrained ATPG
When the ATPG algorithm cannot be modified but is capable of accepting con-
straints (this feature is offered in many commercial ATPG tools), the problem of
generating power-aware test patterns can be viewed as a constrained ATPG prob-
lem. In this context, a typical constraint is a user-specified toggling activity limit
that needs to be satisfied for each generated pattern. During the test generation pro-
cess, the ATPG tool evaluates the toggling activity generated by each test pattern,
and only replaces don't care bits needed to keep the toggling activity under the
specified limit ( Ravi et al. 2007 ).
7.4.1.3
Power-Aware X-filling
The number of don't care (X) bits in test cubes generated by an ATPG tool is usually
a very high fraction of the total number of bits. Even after static or dynamic test
compaction and test relaxation, this number can still be high enough to be exploited
by power-aware X-fill techniques ( Wohl et al. 2003 ). These techniques propose a
judicious filling of don't care (X) bits to achieve significant reduction in test power
consumption.
Various X-fill techniques have been proposed so far, including 0-fill (fill all X bits
with 0), 1-fill (fill all X bits with 1), and Minimum Transition fill (MT-fill) also called
adjacent fill (fill any X bit with the nearest care bit from the input side). Though
only addressing shift-in power reduction (shift-out power is not considered), they
Search WWH ::




Custom Search