Hardware Reference
In-Depth Information
Tabl e 6. 3
Single-cell linked faults
FFM
FPs
TF
x
!
WDF
x
<x;
w
x
=x= >!<x;
w
x
= x= >; x 2f0; 1g
WDF
x
!
WDF
x
<x;
w
x
= x= >!<
x;
w
x
=x= >x2f0; 1g
DRDF
x
!
WDF
x
<x;r
x
= x=x >!<
x;
w
x
=x= >; x 2f0; 1g
TF
x
!
RDF
x
<x;
w
x
=x= >!<x;r
x
= x=Nx>;x2f0; 1g
WDF
x
!
RDF
x
<x;
w
x
= x= >!<
x; r
x
=x=x >; x 2f0; 1g
DRDF
x
!
RDF
x
<x;r
x
= x=x >!<
x; r
x
=x=x >; x 2f0; 1g
faults where the following notation is used: op
2f
r;
w
g
, x
2
D
y
1
, x
i
D
y
i
if
op
i
D
r .
3-coupling linked faults
: 3-coupling linked faults are composed of FPs sharing
the same victim cell but having different aggressor cells (a
1
and a
2
). Considering
the possible mutual positions of a
1;
a
2
,and
v
, realistic fault models proposed in
and (ii) a
2
<
v
<a
1
. Realistic 3-coupling linked faults can be represented by
the same FPs used to represent 2-coupling linked faults.
6.4.7
Fault Models for Specific Technologies and Architectures
The space of fault models defined in the previous sections is far from representing
a complete taxonomy of possible memory faults. It actually focuses on a set of very
high level, technology independent faults that can be easily applied to any type of
memory.
As we start exploring all the dimensions of the multidimensional space intro-
example:
Fault models for multi-port memories (
Hamdioui et al.
2001
)
Fault models for cache memories (
Al-Ars et al.
2008
)
A detailed analysis of all these fault models is out of the scope of this chapter, and,
if interested, the reader should refer to specific publications.
6.5
From Fault Models to Memory Testing
In order to inspect memory devices for possible faulty behaviors, all memory com-
ponents are usually tested at the end of production and sometimes in the field. As
tional test patterns that try to cover FFMs.