Models in Memory Testing - Models in Hardware Testing - page 163

the address decoder logic usually referred to as address faults (AF) , FFMs for
the memory cell array usually referred to as memory cell faults , and FFMs for the
read/write logic.
Address faults have been one of the first studied memory fault models. Thatte
et al. ( 1977 ) and Nair (1979) provide a non-formal definition of four categories of
address faults:
1. Type 1 AFs : with a certain address no cell is accessed.
2. Type 2 AFs : a certain cell is not accessible by any address.
3. Type 3 AFs : with a certain address, multiple cells are accessed simultaneously.
4. Type 4 AF : a certain cell is accessible with multiple addresses.
In Van de Goor ( 1991 )and Van de Goor et al. ( 1990 ) a set of proofs show that, under
well defined conditions, test algorithms designed for memory cell faults are able to
detect address faults. The same happens for faults in the read/write logic. In Nair
et al. ( 1978 ) , Thatte et al. ( 1977 ), Van de Goor ( 1991 ) , and Marinescu ( 1982 ), Van
de Goor and others give a proof that faults in the read/write logic of the memory are
equivalent to faults in the memory array.
For this reason this section will focus on memory cell faults, only.

6.4.1 FFMs Definition and Representation

Defining FFMs has been up to now a very ad-hoc process, usually performed by
inserting electrical defects into an electrical model of a memory followed by an
intensive campaign of simulations to understand the effect of the defects on the
memory behavior. Inductive fault analysis (IFA) ( Shen et al. 1985 ) is an additional
common practice to analyze the chip layout, and to determine which FFMs correctly
describe the actual physical defects that occur. The challenge in this process is the
choice of the stimuli applied during simulation. To show the presence or absence
of a new FFM the precise sequence of stimuli able to sensitize the fault needs to
be identified and applied. This in turn requires knowing a priori the behavior of the
fault, or precisely defining the space of potential faults to be later explored for the
identification of new FFMs.
Amemory functional fault model can be informally defined as the deviation of
the observed memory behavior from the specified one, under a given sequence of
performed memory operations.
Two basic elements are therefore required to define a generic FFM:
1. A sequence of memory operations able to sensitize the fault, usually referred to
as sensitizing operation sequence (SOS)
2. A list of observed deviations of the memory behavior from the observed one,
usually referred to as faulty behavior (FB)
A common and very effective way to represent this information is the fault primitive
(FP) formalism first introduced in Van de Goor et al. ( 2000 ) ,andthenrefinedin
Benso et al. ( 2008 )(Eq. 6.1 ) .