Hardware Reference
In-Depth Information
When SUPERB is used in the PPSFP (parallel-pattern) mode, one multiple stuck-
at fault f (representing a section) is fault-simulated under 64 test patterns t
1
;:::; t
64
simultaneously. Every signal line j is assigned a 64-bit string B
j
represented using
a machine word. The
ith
position of B
j
stands for the logic value of signal line j
under test pattern t
i
when fault f is injected. The circuit is processed in topological
order, i.e., from inputs to outputs. If signal line j is a primary input, its
ith
position
is set to the corresponding value of test pattern t
i
. If signal line j is an internal line
it must be driven by some logic gate. We first assume that the inputs of that gate
are not affected by the fault being simulated under any of the 64 test patterns. B
j
is then obtained by applying the bit-wise logic function of the gate to the bit-strings
of its inputs. For example, suppose that j is the output of a NOR3 gate with inputs
k, l and m. Their bit-strings B
k
, B
l
and B
m
have been calculated already. B
j
is
obtained as
B
j
D:
.B
k
_
B
l
_
B
m
/;
where
:
is the bit-wise NOT and
_
is the bit-wise OR operation.
The fault injection is performed by defining two
64-bit masks
for each signal
line j : AND mask A
j
and OR mask O
j
.The
ith
position of A
j
is set to 0 if a
stuck-at-0 is injected at signal line j under test vector t
i
. Otherwise (if a stuck-at-
1 fault or no fault is injected), it is set to 1. Symmetrically, the
ith
position of O
j
is set to 1 if a stuck-at-1 is injected at signal line j under test vector t
i
andto0
otherwise. A bit-wise AND operation with A
j
and a bit-wise OR operation with
O
j
is integrated into the calculation of the bit-strings corresponding to the internal
signals. The computation for the NOR3 gate mentioned above becomes
B
j
D:
..B
k
^
A
k
_
O
k
/
_
.B
l
^
A
k
_
O
k
/
_
.B
m
^
A
k
_
O
k
// :
The overall flow of SUPERB in the PPSFP mode for an RBF restricted to a section
is as follows. After good-simulation of 64 test patterns, AND and OR masks are
generated for all inputs of the gates driven by a bridged line. This information is
extracted from the hash table corresponding to the section considered. For each of
the 64 test patterns, the FSIC of the gates driving the bridged lines is determined
from the good-simulation and the equivalent multiple stuck-at fault is looked up in
the hash table. The
ith
position of A
j
is set to 0 if the equivalent multiple stuck-at
fault from the hash table contains a stuck-at-0 fault j /0; the
ith
position of O
j
is
set to 1 if it contains j /1. After that, simulation takes place in topological order, as
outlined above.
In SPPFP (parallel-fault) mode, SUPERB simulates one test pattern for 64 mul-
tiple stuck-at faults (i.e., sections). The sections can but don't have to belong to
one RBF. AND and OR masks are created at all lines involved in at least one sim-
ulated RBF. The FSICs of the gates driving the bridged lines are determined by
good-simulation. The masks are filled by looking up in up to 64 hash tables, using
the FSIC as the key. The subsequent simulation process is identical to the PPSFP
case.
