Fault Modeling for Simulation and ATPG - Models in Hardware Testing - page 106

An ATPG algorithm for resistive bridging faults is presented in Section 4.4 . Sec-
tion 4.5 briefly describes extensions of the model to sequential circuits, feedback
faults, non-nominal test conditions, and dynamic effects.

4.1 Resistive Fault Coverage

Under a simple fault model such as the stuck-at fault model, a fault is either detected
with certainty (i.e., its detection probability is 100%), or definitely undetected (its
detection probability is 0%). If we assume that all faults are equally likely to occur,
fault coverage can be interpreted as the average of individual detection probabilities
of all faults, i.e., the probability that a fault in the circuit will be detected by a
test set. Resistive fault coverage should provide the same information for resistive
faults.
Resistive fault models incorporate the defect resistance as a continuous param-
eter. For clarity, we employ the following terminology throughout this chapter (we
restrict ourselves to two-node non-feedback resistive bridging (RBF) defects al-
though the concepts can be readily extended to other types of bridges and other
defect classes such as resistive interconnect opens). We denote by a bridging fault
the pair of circuit lines involved in the bridge. We call the pair of circuit lines and the
bridge resistance R sh a bridging defect . A bridging fault corresponds to an infinite
number of bridging defects with different resistances.
A test set could detect some of the bridging defects belonging to a bridging fault
and miss other defects. Some of the missed defects could be detectable by test pat-
terns not included in the test set while other missed defects could be redundant, i.e.,
not detectable by any possible test pattern. Moreover, the probability that a bridg-
ing defect occurs generally depends on R sh . We assume that the probability density
function of the bridging defect resistance ¡ is known. ¡.R sh / gives the probabil-
ity of occurrence of a bridging defect with resistance R sh ; it can be extracted from
manufacturing process data ( Renovell 1996 ).
Resistive fault coverage of a test set is first defined with respect to one resistive
bridging fault f . Let the set of all resistances for which the bridge defect cor-
responding to f is detected be called the covered analogue detectability interval
(C-ADI) and denoted C.f /. As the name suggests, C.f / is often (though not al-
ways) an interval of shape [0, R]forsomeR. This means that fault f is detected if
the defect resistance R sh does not exceed R.
The first resistive fault coverage metric is called pessimistic fault coverage P-FC
[ Renovell 1995 ]. It is defined as follows:

R C.f / .r/ dr
R 0

P FC .f / D 100% :

.r/ dr

The “fraction” of R sh values for which fault f is detected among all possible
resistance values from 0 to

1

is weighted by ¡. ¡ is often normalized such that