Digital Signal Processing Reference
In-Depth Information
design. The reason behind this structure is twofold: in order to achieve high
voltage gain, the output resistance of the input stage is typically boosted using
cascoded transistors. Alas, the high output resistance is equivalent to limited
capacitive load driving capabilities. The buffer stage at the output provides less
voltage gain, but has a lower impedance for driving a higher capacitive load.
However, this is only one part of the story. Every single stage in the ampli-
fier introduces an extra pole in the signal path. If this second-order system is
going to be embedded in a feedback loop, stability analysis comes into play.
Without going too much into detail, a stable feedback system requires a certain
positive phase margin at unity gain of the open-loop system (which does in-
clude the feedback path!). Depending on the exact requirements, a maximally
flat frequency response or a minimal settling time, a typical value of the phase
margin is in the range of 60-70
◦
. What is of more importance in the context of
this discussion is that stability also implies that the location of the poles cannot
be chosen arbitrarily. The first pole of the system is always located at a fairly
low frequency and causes the decrease of 20 dB
/
decade (6 dB
/
octave) in gain.
Which of course, in a closed loop system, will be translated in a decrease of ex-
cess loop gain and a corresponding decrease of distortion suppression. In order
to guarantee stability, the non-dominant pole of the amplifier must be located
well beyond the unity-gain crossover point of the open-loop transfer character-
istic. A typical value for the location of the second pole is around two or three
times beyond the frequency of the open-loop unity-gain crossover point.
At this moment, it would be interesting to find out what frequency can be
achieved for the second pole. And then, by performing the previous reasoning
backwards, find out what maximum distortion suppression can be achieved up
to a certain frequency. First, it is important to remember that the maximum cut-
off frequency of one single transistor is defined by
f
T
. The cut-off frequency
defines the point at which, for a certain technology, the
current gain
of a min-
imum sized transistor drops to unity. This means that beyond this frequency
point, the signal source must deliver more current to the gate-source capacitor
than what is eventually available at the drain terminal of the transistor.
Cut-off frequency versus
f
max
It should be noted that this does not mean that the transistor becomes
utterly useless for frequencies beyond
f
T
. For tuned, passband appli-
cations, the transistor can serve up to much higher frequencies. This
would be defined by the
maximum frequency of oscillation
(
f
max
), but
this goes out of the scope of this discussion [Dro55]. In a baseband
application however, using a transistor above it's unity gain frequency
is a fairly uncommon operation. Although it would give evidence of
some original and remarkable insight of the designer.
