Digital Signal Processing Reference
In-Depth Information
Frequency dependent linearity of differential stages
In the previous sections, our focus had been limited to the case of a single-
stage single transistor amplifier. However, several multi-transistor configura-
tions have been brought into existence, with a performance exceeding this of a
single transistor stage by many orders of magnitude. The first thing that comes
to the mind is the differential amplifier. The main advantage of this type of
amplifier is that even-order distortion components are suppressed. Most un-
desired even-order signal components are generated by power-supply noise or
external noise sources. This noise signal couples into high-impedance nodes
of the circuit, which includes basically every node in the circuit where a con-
siderable voltage gain must be realized. Also, even-order components caused
by the transistor pair itself are suppressed, which makes the differential topol-
ogy suited to counteract distortion caused by the quadratic characteristic which
is so characteristic of mos transistors. Provided that the amplifier is designed
with the appropriate symmetry and matching rules in mind, both signal paths
of the differential amplifier are affected more or less to the same extent by the
noise source. Because only the differential output signal is of interest in a dif-
ferential configuration, common mode noise can be safely ignored under most
circumstances.
In the above discussion, it was described how a symmetrical circuit topol-
ogy provides immunity against distortion merely by agreeing on the fact that
common-mode and differential signals have orthogonal dimensions. An impor-
tant, but easily underestimated player in a differential topology is the output
impedance of the current source, located at the common terminal node of the
differential gain pair (Figure A.20). Because this biasing transistor does not
play any significant role in the differential current flow between the two gain
elements, it does also not appear in the differential small-signal gain expression
of the amplifier. Conversely, the bias transistor
does
actually interfere with the
common mode current flow, in the sense that it prevents changes in the total
net current through the differential pair. The result is that the common-mode
transconductance gain is being suppressed. The efficiency of this common-
mode suppression heavily depends on the output impedance of the current
source.
In the lower frequency range, the (finite) output resistance of the current source
plays a leading role in the common mode suppression ratio performance of
the differential amplifier. In order to increase the output resistance of the bias
transistor, one may choose to extend the channel length. However, increasing
the dimensions of the current source must be done with caution: a larger area
of the current source transistor will always be accompanied with larger par-
asitic capacitances. It follows that for higher frequencies, the role of the re-
sistive output impedance is gradually replaced by capacitive parasitics. As a
