Digital Signal Processing Reference
In-Depth Information
Figure 7.9.
Photograph of the measurement setup. The chip is bonded on an alu-
mina substrate. Note the four microstrip structures which deliver the
rf-signals as close as possible to the amplifier. The ground plane of
the microstrip is not visible because it is at the back of the substrate.
removes the need of using a tapered buffer and as such saves chip area and
power. Each stage provides a voltage gain of 1
.
5(3
.
5 dBV), resulting in an
overall gain of about 30 dB. The measured 3 dB bandwidth of the amplifier
ranges from 20 up to 850 MHz, which could be achieved thanks to the capaci-
tive cross-coupling near the
3 dB frequency.
The measured bandwidth performance of the amplifier is shown in Figure 7.10.
During the first measurements, reflections at the input stage of the amplifier
caused a considerable amount of ripple in the frequency response at the higher
end of the frequency band. It turned out that the problem was caused by the
bonding wires which interconnect to the microstrip structures in combination
with the capacitive load of on-chip esd protection structures. This assumption
was also confirmed by S
11
measurements at the input of the amplifier. Because
of the large fractional bandwidth of the system, it becomes very difficult to tune
this inductance to the frequency of interest with traditional on-chip matching
methods. The issue was solved by using shorter bonding wires and by laser-
cutting part of the esd protection from the input stages. An even better solution
would consist in a complete switch-over to a flip-chip approach.
For a gain setting of 30 dB, the output-referred third-order intercept point
(oip
3
) over the specified frequency band is better than
−
11 dBm measured
over a 50
load impedance. A summary of the measurement results can be
+
