BIOMIMETIC CORTICAL NANOCIRCUITS - Bio-Inspired and Nanoscale Integrated Computing - page 458

The mathematical models we are developing include prediction of the time-
frame and feasibility of a synthetic cortex, prediction of the neuron size over time,
and prediction of interconnection requirements.
17.2.1. Justification for the Custom Circuit Approach
Our focus on custom circuits is in contrast to computer models that simulate
neural behavior using conventional multiprocessors. In recent years, several
artificial brain projects have been launched that rely on computer simulations
of neural behavior, hosted on multiprocessors, such as the IBM artificial brain
project in cooperation with EFPL [8]. However, even on much smaller simulations
such as a partial mouse brain, the IBM simulations ran an order of magnitude
slower than real time [13]. Emulation can have several advantages over simulation,
generally being faster, sometimes running at nearly real time for small problems.
For brain emulation, speed may not be as critical since neurons are slow in
comparison to electronics, but performance becomes an issue when the inter-
connection hardware is extensively time-shared to interconnect many parts of the
brain. Of course, interprocess communication is also problematic in software
brain emulations.
The challenge of using programmable processors to simulate the cortex is the
scale. Although software models could solve the problems of neural interconnec-
tivity and brain plasticity, since they can be programmed into the neural data
structures, the inefficiencies of using software to model biological (continuous,
analog-like) behavior requires massive supercomputing structures to simulate
small networks of neurons. Even if we exploit novel technologies like carbon
nanotubes and single electron transistors to implement conventional computer
architectures, the problems of scale are still present. Nanotechnologies like
carbon nanotubes possess physical properties that could allow significantly
denser packaging in three dimensions when used in custom electronic circuits,
resulting in neural structures on the same order of magnitude of volume as a
human brain, dense enough to implement some limited neural computation
capability.
While custom CMOS hardware solutions might be significantly smaller than
software solutions per neuron modeled, synthetic cortical structures implemented
using distinct CMOS electronic circuits for each synapse and neuron, sometimes
called neuromorphic circuits [1], could still be quite large. Boahen has fabricated
and demonstrated integrated circuits with 10,000 neurons by sharing the synaptic
circuitry so that each neuron only possesses a single synaptic circuit. In order to
capture the computations performed in the dendritic tree believed to be important,
such sharing might need to be limited or abandoned. Assuming distinct synapse
circuits for each synapse, we have predicted [2] that the CMOS technology
required to implement the neurons in a synthetic human cortex in a single room
is at least a decade away. This prediction did not include interconnectivity and
learning structures.