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between any two adjacent levels. The proposed data encoding methods are aimed
at providing sufficient bit error rates for a system with a SNR of the order of 5 dB.
ACKNOWLEDGMENTS
The authors would like to aknowledge the insighful discussions with Dr. Michael
Alex of Hitachi Research and the continous support by the research groups led by
Song Xue of Seagate Technology, Steve Lambert of Hitachi Global Storage
Technologies, and Robert Haddon of Center for Nanoscience Innovation for
Defence (CNID), University of California, Riverside. This work is partially
supported by four grants from the National Science Foundation (NSF): ECS-
0401297, ECS-0508218, ECS-0404308, and IIP-0712445, respectively; two grants
from the U.S. Air Force Office of Scientific Research (AFOSR): FA9550-04-1-
0446 and FA9550-05-1-0232, respectively; and one grant co-sponsored by Defence
MicroElectronics Activity (DMEA) and Defence Advanced Research Project
Agency (DARPA): DOD/DMEA-H94003-06-2-0608.
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