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0.1
0.2
0.8
0.15
0.6
p
p
0.1
0.4
0.05
0.2
0
0
0.01
0.02
0.03
a
0.04
0.05
0
0
0.2
0.3
0.4
0.5
0.1
a
Figure 5.13. Phase diagram of dielectrophoretic forces (F 2 , F 3 , F 4 , F 5 )/F 1 in the space
of dimensionless electrode voltages (a) versus electrode spacings (p)ina22
crossbar geometry. Darker regions indicate that more of F 2 , F 3 , F 4 , F 5 are less than F 1 .
parameters 0
1 that cause all of these ratios to fall below 1. We
survey this phase space in Figure 5.13, and find that—at least by this prediction
method—long crossbar-style interconnects should be possible as long as the
parallel electrode pitch is 10-20 times smaller than the interconnect length
(0.05
a
1/2, 0
p
o
o
o
o
p
0.1) and electrodes uninvolved in the trapping are kept grounded
o
o
(a=0).
5.4.3. Field-Programmable Gates
In addition to interconnect architectures, it should also be possible to more
directly build logic based on dielectrophoretic reconfiguration of nanodevices. In
particular, with the proper arrangement of pairs of the latching electrodes shown
in Figure 5.8, digital logic gates can be reproduced. In these gates, as depicted in
Figure 5.14, the relative phase of two electrodes determines the position of
interconnects which can then carry or block a current path specific to the logical
operation required.
5.4.4. Packaging
In order to enable the vision of dielectrophoretic architectures for self-repairing
computer components, development of stable colloidal reservoirs of compo-
nents will be crucial. Fortunately, many dielectric solvents, such as the benzyl
alcohol used in the reconfigurable nanowire work discussed above, have low vapor
pressures. This property may enable colloidal reservoirs of replacement compo-
nents to be stably sealed into a chip carrier package, as shown in Figure 5.15.
 
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