DIELECTROPHORETIC ARCHITECTURES - Bio-Inspired and Nanoscale Integrated Computing - page 167

5.4. LARGER-SCALE ARCHITECTURES

With our discussion of individual component reconfigurability concluded, we now
advance to an exploration of the feasibility of larger-scale dielectrophoretic
architectures. For dielectrophoresis to find real-world applications to nanocom-
putation, logic—at least at the gate level—must be demonstrated.

5.4.1. 1 1 Crossed Interconnects

In Section 5.3 we experimentally demonstrated the reconfiguration of intercon-
nects geometrically occupying single sides or pairs of sides of a square. As a next
step toward larger-scale architectures, we should also consider interconnects that
do not lie on the circumference of the trapping region, but instead span it. In
particular, we may estimate the value of the term r E 2 , which is crucial to the
dielectrophoretic strength, for either type of configuration, as shown schematically
in Figure 5.11.
Recall that we may approximate the trapping force by assuming a uniform
electric field gradient near the energy minimum. Therefore, for the geometry
shown in Figure 5.11, for the noncircumferential interconnect (I),

3

=ð d 2

p

V 2
d 3 ;

1
2 3 = 2

r E 2

2 3

ðÞ Þ ¼

and for the circumferential interconnect (II),

V 2
d 3 :

1
2 2

r E 2

2 3

ð V = 2 Þ =ð d Þ ¼

+ V/2

d

I

0

0 II

− V/2

Figure 5.11. Schematic diagram for circumferential (II) versus noncircumferential
(I) interconnects in a 11 crossbar.