DIELECTROPHORETIC ARCHITECTURES - Bio-Inspired and Nanoscale Integrated Computing - page 166

Figure 5.10. Disassembly of nanowire interconnects by thermal detonation. (a) Stably
trapped nanowire before detonating voltage pulse. (b) Vapor bubble resulting from
thermal detonation. (c) Only submicron fragments remain. Scale bars are 20 mm.
the nanowires trapped in inter-electrode regions and might be explained by
variation in the nanowire conductivities and/or the formation of exceptionally
good contacts, which could lead to current densities as high as 5 10 10 A m 2
and thermal detonation. After the original nanowires were destroyed, the inter-
electrode regions were typically able to trap new interconnects, so this effect might
prove useful in fault-tolerant applications for severing connections to non-
functioning components.
5.3.5. Summary of Implementation
The first assembly, reconfiguration, and disassembly of nanowire interconnects
through dielectrophoresis has been presented. Silicon nanowires up to 55 m m long
were trapped, and solvent-based transport studies show a 50% conductivity
enhancement in the presence of the nanowires. Once assembled, these nanowire
interconnects could then be reconfigured and disassembled using periodic voltage
bursts. These results open up the possibility of colloidal, nanostructured connec-
tion architectures for computation.