Information Technology Reference
In-Depth Information
Figure 4.31. The 4-bit QCA ALU. The inputs arrive at the lower left corner, and the
outputs are read at the upper right.
In order to provide the processor with data loading and storing capabilities,
four 4-bit registers act as physical memory. Instructions are available to store the
current accumulator value into any register, and similarly load the contents of any
register into the accumulator for computations using the ALU.
Figure 4.32 shows the memory layout. It takes four clock cycles for data to be
stored in a register, and five clock cycles for data to be available at the output.
However, as discussed above, this reduces to one read or write operation per clock
cycle in the steady state. The feed-through path, i.e., write then immediately read,
consumes only six clock cycles since the read operation is not required to wait for
the write to complete.
Figure 4.32. The 44-bit memory block. Data enters the block at the lower left,
along with the register address and read/write signal. The data is then made
available at the upper right.
 
Search WWH ::




Custom Search