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A
A
M(A, B ,C)
M(A,B,C)
B
C
B
M
C
Figure 4.11. The three-input majority gate is the fundamental logic primitive
available with QCA. It is created from a cross pattern of five cells. At least two of
the cells must be logic '1' before the output is logic '1.'
At least two of the inputs to the gate must be of the same polarization before
the output attains that polarization. This gate is a member of the higher class
of threshold gates where the sum of weighted inputs must exceed the threshold
before the output switches state [60]. The three-input majority gate is implemented
with the layout shown in Figure 4.11.
The majority gate can be programmed to perform the standard two-input
AND as well as two-input OR operations by fixing the polarization of one of the
three available inputs as illustrated in Figure 4.12.
4.8. FIXED POLARIZATION CELLS
Fixed polarization cells are required to implement AND and OR functions, as
discussed in the previous section. There are two possible methods for realizing
B
B
A
AB
A
A+B
1
1
B
B
A+B
AB
A
A
Figure 4.12. The majority gate as a programmable AND and OR gate. Fixing one
of the inputs to logic '0' creates a two-input AND gate. Alternatively, if we fix
one of the inputs to logic '1' we obtain a two-input OR gate.
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