Hardware Reference
In-Depth Information
Example 2.16
Use an appropriate increment or decrement instruction to replace the following instruction
sequence:
ldaa
i
adda
#1
staa
i
Solution: These three instructions can be replaced by the following instruction:
inc
i
2.6.7 Bit Condition Branch Instructions
In certain applications, one needs to make branch decisions on the basis of the value of a
few bits. The HCS12 provides two special conditional branch instructions for this purpose. The
syntax of the first special conditional branch instruction is
brclr opr, msk, rel
where
opr specifies the memory location to be checked and can be specified using direct, extended, and all
indexed addressing modes.
msk is an 8-bit mask that specifies the bits of the memory location to be checked. The bits to be checked
correspond to those bit positions that are 1s in the mask.
rel is the branch offset and is specified in 8-bit relative mode.
This instruction tells the HCS12 to perform bitwise logical AND on the contents of the
specified memory location and the mask supplied with the instruction, then branch if the re-
sult is 0. For example, for the instruction sequence
here brclr $66,$80,here
ldd $70
the HCS12 will continue to execute the fi rst instruction if the most signifi cant bit of the mem-
ory location at $66 is 0. Otherwise, the next instruction will be executed.
The syntax of the second special conditional branch instruction is
brset opr, msk, rel
where
opr specifies the memory location to be checked and can be specified using direct, extended, and all
indexed addressing modes.
msk is an 8-bit mask that specifies the bits of the memory location to be checked. The bits to be checked
correspond to those bit positions that are 1s in the mask.
rel is the branch offset and is specified in 8-bit relative mode.
This instruction tells the HCS12 to perform the logical AND of the contents of the speci-
fied memory location inverted and the mask supplied with the instruction, then branch if the
result is 0 (this occurs only when all bits corresponding to 1s in the mask byte are 1s in the
tested byte). For example, for the instruction sequence
 
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