Hardware Reference
In-Depth Information
Instruction queue A circuit in the CPU to hold the instruction bytes prefetched by the CPU.
The HCS12 and some other microprocessors utilize the bus idle time to perform instruction
prefetch in the hope of enhancing the processor throughput.
Instruction tagging Putting a tag on an instruction so that when detected by the HCS12 CPU,
the CPU enters background debug mode, does not execute the tagged instruction, and stops
executing the application program.
Integrated development environment A piece of software that combines a text editor, a
terminal program, a cross compiler and/or cross assembler, and/or simulator to allow the
user to perform program development activities without quitting any one of the programs.
Interframe space A field in the CAN bus that is used to separate data frames or remote
frames from the previous frames.
Inter-integrated circuit A serial communication protocol proposed by Philips in which two
wires (SDA and SCL) are used to transmit data. One wire carries the clock signal, and the
other wire carries the data or address information. This protocol allows multiple master
devices to coexist in the same bus system.
Interrupt An unusual event that requires the CPU to stop normal program execution and
perform some service to the event.
Interrupt overhead The time spent handling an interrupt, consisting of saving and restoring
the registers and executing the instructions contained in the service routine.
Interrupt priority The order in which the CPU will service interrupts when all of them occur
at the same time.
Interrupt service The service provided to a pending interrupt by the CPU's execution of a
program called a service routine.
Interrupt vector The starting address of an interrupt service routine.
Interrupt-vector table
A table that lists all interrupt vectors.
I/O synchronization
A mechanism that can make sure that CPU and I/O devices exchange
data correctly.
ISO International Standard Organization.
Keyboard debouncing A process that can eliminate the keyswitch bouncing problem so that
the computer can detect correctly whether a key has indeed been pressed.
Keyboard scanning
A process that is performed to detect whether any key has been pressed
by the user.
Key wake-up A mechanism, associated with I/O ports, that can generate interrupt requests to
wake up a sleeping CPU.
Label field The field in an assembly program statement that represents a memory location.
Linked list A data structure that consists of linked nodes. Each node consists of two fields, an
information field and a next address field. The information field holds the element on the
list, and the next address field contains the address of the next node in the list.
Load cell A transducer that can convert a weight into a voltage.
Local variable Temporary variables that exist only when a subroutine is called. They are
used as loop indices, working buffers, and so on. Local variables are often allocated in the
system stack.
Low-power mode An operation mode in which less power is consumed. In CMOS technology,
the low-power mode is implemented by either slowing down the clock frequency or turning
off some circuit modules within a chip.
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