Internal Memory Configuration and External Expansion - The HCS12/9S12: An Introduction to Software and Hardware Interfacing - page 743

Step 2
Write the value of 0x55 to the memory location at 0x2AAA.
Step 3
Write the value of 0x80 to the memory location at 0x5555.
Step 4
Write the value of 0xAA to the memory location at 0x5555.
Step 5
Write the value of 0x55 to the memory location at 0x2AAA.
Step 6
Write the value of 0x20 to the memory location at 0x5555. After this step, software data
protection is exited.
Step 7
Write any value(s) to any location(s).
Step 8
Write the last byte to the last address.

D EVICE I DENTIFICATION
An extra 128 bytes of EEPROM memory are available to the designer for device identification.
By raising the voltage at the A9 pin to 12 V

0.5 V and using the address locations 0x1FF80 to
0x1FFFF, the bytes may be written to or read from in the same manner as the regular memory array.

±

R EAD AND W RITE T IMING
The read cycle timing diagram is shown in Figure 14.39. The AT28C010 has three read
access times.
• Address access time t ACC
• CE access time t CE
• OE access time t OE
Each of the read access times is measured by assuming that the other control signals and/or
the address have been valid. For example, the address access time is the time from the moment
that the address inputs to the AT28C010 become valid until data is driven out of data pins

Address Address valid

CE

t CE

t DF
t OH

t OE

OE

t ACC

High-Z

Data Output valid

Figure 14.39 ■ AT28C010 read timing diagram