Internal Memory Configuration and External Expansion - The HCS12/9S12: An Introduction to Software and Hardware Interfacing - page 725

EEModOK brclr ESTAT,CBEIF,* ; wait for command buffer to empty

movw 2,Y,2,X ; write second data word to second word of

; EEPROM

movb #Program,ECMD ; write program command

movb #CBEIF,ESTAT ; launch the program command

brclr ESTAT,ACCERR 1 PVIOL,EEPR2OK

ldab #1

rts

EEPR2Ok brclr ESTAT,CCIF,EEPR2OK ; wait for program command completion

clrb ; successful program code is 0

rts

The C language version of the function is as follows:
int EESectorModify(unsigned int *src, unsigned int *dest)
{

ESTAT 5 ACCERR | PVIOL; // clear error flags

if(!(ESTAT&CBEIF))

return 1; // command buffer not empty is error

*dest 5 *src; // write first data word

ECMD 5 SectorModify; // write sector-modify command

ESTAT 5 CBEIF; // launch the sector-modify command

if(ESTAT&(ACCERR | PVIOL))

return 1; // command failed

while(!(ESTAT&CBEIF)); // wait for command buffer to become empty

*(dest 1 1) 5 *(src 1 1); // write second data word

ECMD 5 Program; // write the program command

ESTAT 5 CBEIF; // launch the program command

if(ESTAT&(ACCERR | PVIOL))

return 1; // command failed

while(!(ESTAT&CCIF)); // wait for command buffer to become empty

return 0;

}

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14.7 HCS12 External Memory Interface

The HCS12 can access external memory when it is reset into one of the expanded modes.
Address and data signals are multiplexed onto the Port A and Port B pins; the Port E and Port K
pins supply control signals that are required for accessing external memories.

14.7.1 HCS12 Pins for External Memory Interfacing
The HCS12 external memory interface uses 27 pins and is implemented across four I/O ports
(A, B, E, and K). The signal pins used in external memory interface are listed in Table 14.7. The
signals ADDR0, . . . , ADDR15 and XADDR14, . . . , XADDR19 are used to select a memory loca-
tion to access and are referred to as the address bus . The signals DATA0, . . . , DATA15 are used to
carry data and are referred to as the data bus . The remaining signals are referred to as the control
bus . When the external memory is not paged, only the lower 16 address/data pins are used. How-
ever, if expanded memory is enabled, then ADDR14 and ADDR15 are not used. Instead, signals