Hardware Reference
In-Depth Information
It is critical to configure the FCLKDIV register properly because this register controls the
timing of the programming and erasure operations for the flash memory. It is necessary to di-
vide the oscillator down to within the 150- to 200-kHz range.
Let
FCLK be the clock of the flash timing control block
T
bus
be the period of the E-clock
INT(
x
) take the integer part of
x
[e.g., INT(3.5) 5 3]
Example 14.4
▼
Assume that
f
bus
5 24 MHz and
f
osc
5 16 MHz, respectively. Determine an appropriate
value to be written into the FCLKDIV register to set the timing of programming and erasure
properly for the flash memory and EEPROM.
Solution:
Follow the logic flow illustrated in Figure 14.16.
1.
T
bus
5 41.7 ns (, 1 µs)
2. Initialize the PRDIV8 bit to 0.
3
. f
osc
5 16 MHz (. 12.8 MHz)
4. Set PRDIV8 to 1 and set PRDCLK to
f
osc
/8 5 2 MHz.
5. PRDCLK 3 (5 1 0.0417 µs) 5 10.08, not an integer.
6. Set FDIV[5:0] to INT(PRDCLK[MHz] 3 (5 1
T
bus
[µs])) 5 10.
7. FCLK 5 PRDCLK/(1 1 FDIV[5:0]) 5 2 MHz 4 11 5 181.81 kHz
8. 1/FCLK[MHz] 1
T
bus
[µs] 5 5.5 (. 5) and FCLK . 150 kHz, so stop.
9. Write the value of $4A into the FCLKDIV register.
▲
The HCS12 uses a command state machine to supervise the write sequencing for the flash
memory programming and erasing. Before starting a command sequence, it is necessary to ver-
ify that there is no pending access error or protection violation in any flash blocks. It is then
required to set the PPAGE register and the FCNFG register. The procedure for this initial setup
is as follows:
1. Verify that all ACCERR and PVIOL flags in the FSTAT register are cleared in all banks.
This requires checking the contents of the FSTAT register for all combinations of the
BKSEL bits in the FCNFG register.
2. Write to bits BKSEL in the FCNFG register to select the bank of registers corresponding
to the flash block to be programmed or erased.
3. Write to the PPAGE register to select one of the pages to be programmed if programming
is to be done in the $8000,$BFFF address range. There is no need to set PPAGE when
programming in the $4000,$7FFF or $C000,$FFFF address ranges.
After this initialization procedure, the CBEIF flag should be tested to ensure that the ad-
dress, data, and command buffers are empty. If the CBEIF flag is set to 1, the program/erase
Search WWH ::
Custom Search