Hardware Reference
In-Depth Information
Each of the HCS12 members has a certain amount of on-chip SRAM, EEPROM, and flash
memory. I/O-related registers are implemented in SRAM. These memories share the same
memory space and are assigned to a certain default memory space after reset. To meet the re-
quirements of different applications, these memories can be remapped to other locations. This
can be achieved by programming the appropriate initialization register associated with each
of these memories. Both the EEPROM and flash memory must be erased before they can be
programmed correctly. The erasure and programming methods for both the flash memory and
EEPROM are similar.
Most of the HCS12-based embedded systems operate in the single-chip mode and do not
need external memory. An HCS12 member may have from a minimum of 32 kB of internal
memory up to a maximum of 512 kB of on-chip memory. The memory requirements of a wide
range of applications can be satisfied by different members of the HCS12 microcontroller fam-
ily. In case an application needs more than 512 kB of memory, the designer has the option to add
external memory to the HCS12 device. After adding external memory, an HCS-based embed-
ded system may have up to 1 MB of system memory. The designer should also consider using a
32-bit microcontroller, because a 32-bit microcontroller may prove to be more cost-effective
and has several additional advantages.
•
No paging overhead. The HCS12 has a 16-bit program counter and hence can only
address up to 64 kB of program memory directly. Accessing more than 64 kB of
memory would require a certain type of paging or banking scheme, which has
been proved to be very inefficient. A 32-bit microcontroller does not have such a
problem.
•
Much larger memory space. A 32-bit microcontroller supports 4 GB of memory
space, which can satisfy the memory requirements of many demanding
applications.
•
Much higher performance for the same clock frequency. A 32-bit microcontroller
can process 32-bit data in one operation, whereas the HCS12 can handle only 16
bits of data at a time.
Many microcontrollers multiplex the address and data signals on the same set of signal
pins in order to economize on the use of signal pins. The HCS12 is no exception. In the HCS12,
the address and data signals are time multiplexed on Port A and Port B pins. However, external
memory devices require address signals to be stable throughout the whole access cycle. This
can be achieved by using latches to make a copy of the address signals so that the address sig-
nals remain valid for the whole access cycle.
When adding external memory to the HCS12, we must make sure that the timing require-
ments are satisfied. Each bus cycle takes exactly one E-clock cycle to complete. However, the
bus cycle can be stretched to support slower memory devices. A bus cycle can be stretched by
one to three E-clock cycles.
The internal register block, SRAM, EEPROM, and flash memory have default locations
within the 64-kB standard address space but may be reassigned to other locations during pro-
gram execution by setting bits in mapping registers INITRG, INITRM, and INITEE. These
registers can be written only once in normal operation modes. It is advisable to explicitly
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