Hardware Reference
In-Depth Information
Solution: The first step is to enter the initialization mode and make sure the initialization is
entered. This can be done as follows:
bset CAN1CTL0,INITRQ
brclr CAN1CTL1,INITAK,*
The assembly program that performs the desired configuration is as follows:
openCan1
bset
CAN1CTL1,CANE
; required after reset
bset
CAN1CTL0,INITRQ
; request to enter initialization mode
w1
brclr
CAN1CTL1,INITAK,w1
; make sure initialization mode is entered
movb
#$84,CAN1CTL1
; enable CAN1, select oscillator as clock source
; enable wake-up filter
movb
#$C7,CAN1BTR0
; set jump width to 4 t Q , prescaler set to 8
movb
#$B4,CAN1BTR1
; set phase_seg2 to 4 t Q , phase_seg1 to 4 t Q ,
; set prop_seg to 1 t Q , 3 samples per bit
movb
#$54,CAN1IDAR0
; acceptance identifier T1
movb
#$3C,CAN1IDAR1
; “
movb
#$40,CAN1IDAR2
;
movb
#$00,CAN1IDAR3
;
movb
#$00,CAN1IDMR0
; acceptance mask for extended identifier T1
movb
#$00,CAN1IDMR1
;
movb
#$3F,CAN1IDMR2
;
movb
#$FF,CAN1IDMR3
;
movb
#$50,CAN1IDAR4
; acceptance identifier P1
movb
#$3C,CAN1IDAR5
; “
movb
#$40,CAN1IDAR6
;
movb
#$00,CAN1IDAR7
;
movb
#$00,CAN1IDMR4
; acceptance mask for extended identifier P1
movb
#$00,CAN1IDMR5
;
movb
#$3F,CAN1IDMR6
;
movb
#$FF,CAN1IDMR7
;
clr
CAN1IDAC
; set two 32-bit filter mode
movb
#$25,CAN1CTL0
; stop clock on wait mode, enable wake-up
bclr
CAN1CTL0,INITRQ
; leave initialization mode
rts
The C language version of the function is as follows:
void openCan1(void)
{
CAN1CTL1
| 5 CANE;
/* enable CAN, required after reset */
CAN1CTL0
| 5 INITRQ;
/* request to enter initialization mode */
while(!(CAN1CTL1&INITAK));
/* wait until initialization mode is entered */
CAN1CTL1
5 0x84;
/* enable CAN1, select oscillator as MSCAN clock
source, enable wake-up filter */
CAN1BTR0
5 0xC7;
/* set SJW to 4, set prescaler to 8 */
CAN1BTR1
5 0xB4;
/* set phase_seg2 to 4 t Q , phase_seg1 to 4 t Q ,
prop_seg to 1 t Q */
CAN1IDAR0 5 0x54;
/* set acceptance identifier T1 */
CAN1IDAR1 5 0x3C;
/* “ */
CAN1IDAR2 5 0x40;
/* “ */
CAN1IDAR3 5 0x00;
/* “ */
CAN1IDMR0 5 0x00;
/* acceptance mask for T1 */
 
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