Controller Area Network (CAN) - The HCS12/9S12: An Introduction to Software and Hardware Interfacing - page 649

Address Register Name Access

$_00
$_01
$_02
$_03
$_04
$_05
$_06
$_07
$_08
$_09
$_0A
$_0B
$_0C
$_0D
$_0E
$_0F
$_10
$_11
$_12
$_13
$_14
$_15
$_16
$_17
$_18
$_19
$_1A
$_1B
$_1C
$_1D
$_1E
$_1F

MSCAN control register 0 (CANCTL0)
MSCAN control register 1 (CANCTL1)
MSCAN bus timing register 0 (CANBTR0)
MSCAN bus timing register 1 (CANBTR1)
MSCAN receiver flag register (CANRFLG)
MSCAN receiver interrupt enable register (CANRIER)
MSCAN transmitter flag register (CANTFLG)
MSCAN transmitter interrupt enable register (CANTIER)
MSCAN transmitter message abort request (CANTARQ)
MSCAN transmitter message abort acknowledge (CANTAAK)
MSCAN transmit buffer selection (CANTBSEL)
MSCAN identifier acceptance control register (CANIDAC)
Reserved
Reserved
MSCAN receive error counter register (CANRXERR)
MSCAN transmit error counter register (CANTXERR)
MSCAN identifier acceptance register 0 (CANIDAR0)
MSCAN identifier acceptance register 1 (CANIDAR1)
MSCAN identifier acceptance register 2 (CANIDAR2)
MSCAN identifier acceptance register 3 (CANIDAR3)
MSCAN identifier mask register 0 (CANIDMR0)
MSCAN identifier mask register 1 (CANIDMR1)
MSCAN identifier mask register 2 (CANIDMR2)
MSCAN identifier mask register 3 (CANIDMR3)
MSCAN identifier acceptance register 4 (CANIDAR4)
MSCAN identifier acceptance register 5 (CANIDAR5)
MSCAN identifier acceptance register 6 (CANIDAR6)
MSCAN identifier acceptance register 7 (CANIDAR7)
MSCAN identifier mask register 4 (CANIDMR4)
MSCAN identifier mask register 5 (CANIDMR5)
MSCAN identifier mask register 6 (CANIDMR6)
MSCAN identifier mask register 7 (CANIDMR7)

R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W

R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W

$_20
$_2F
$_30
$_3F

Foreground receive buffer (CANRXFG) R

Foreground transmit buffer (CANTXFG) R/W

Figure 13.16 ■ CAN module memory map

The SYNCH bit indicates whether the MSCAN module is synchronized to the CAN bus.
The MSCAN module has a 16-bit free-running timer. When the TIME bit is set to 1, the timer
value will be assigned to each transmitted and received message within the transmit and re-
ceive buffers. The timestamp is assigned as soon as a message is acknowledged. The WUPE bit
allows the MSCAN module to be woken up by the CAN bus activity. Setting the SLPRQ bit
requests the MSCAN to enter the sleep mode. The sleep mode request is serviced only when
the CAN bus is idle.