Hardware Reference
In-Depth Information
Before the HCS12 can perform A/D conversion, the A/D module must be connected and
configured properly. The procedure for performing an A/D conversion is as follows:
Step 1
Connect the hardware properly. The A/D-related pins must be connected as follows:
V
DDA
: connect to 5 V
V
SSA
: connect to 0 V
V
RH
: 5 V or other positive value less than 5 V
V
RL
: 0 V or other value less than V
RH
but higher than 0 V
If the transducer output is not in the appropriate range, then a signal-conditioning circuit
should be used to shift and scale it to between
V
RL
and
V
RH
.
Step 2
Configure ATD control registers 2 to 4 properly and wait for the ATD to stabilize (need to
wait for 20
μ
s).
Step 3
Select the appropriate channel(s) and operation modes by programming ATD control
register 5. Writing into ATD control register 5 starts an A/D conversion sequence.
Step 4
Wait until the SCF flag of the status register ATD
x
STAT0 is set, then collect the A/D
conversion results and store them in memory.
Example 12.6
▼
Write a subroutine to initialize the AD0 converter for the MC9S12DP256 and start the con-
version with the following setting:
•
Nonscan mode
•
Select channel 7 (single-channel mode)
•
Fast ATD flag clear all
•
Stop ATD in wait mode
•
Disable interrupt
•
Perform four conversions in a sequence
•
Disable FIFO mode
•
Finish current conversion, then freeze when BDM becomes active
•
10-bit operation and two A/D clock periods of the second-stage sample time
•
Choose 2 MHz as the conversion frequency for the 24-MHz E-clock
•
Result is unsigned and right-justified
Solution:
The settings of ATD control registers 2 to 5 are as follows:
The setting of
ATD control register 2
is as follows
:
•
Enable AD0 (set bits 7 to 1)
•
Select fast flag clear all (set bits 6 to 1)
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