Hardware Reference
In-Depth Information
IBDR 5 addr;
/* send out starting address of pagewrite */
while(!(IBSR & IBIF));
/* wait until the address is shifted out */
IBSR 5 IBIF;
/* clear IBIF flag */
if (IBSR & RXAK)
return 2 1;
/* return 2 1 if EEPROM did not respond */
while(ByteCnt) {
IBDR 5 *ptr 11 ;
/* send out 1 byte of data */
while(!(IBSR & IBIF));
IBSR 5 IBIF;
if (IBSR & RXAK)
return 2 1;
/* return 2 1 if EEPROM did not respond */
ByteCnt 22 ;
}
IBCR & 5 , MSSL;
/* generate a stop condition */
return 0;
}
In some applications, the program may need to write several blocks of data to different
locations. An internal write cycle takes about 5 ms to complete. The designer can either call
a delay function to wait for 5 ms or use acknowledge polling to find out whether the internal
write has completed.
Example 11.18
Write a C function to implement the algorithm described in Figure 11.38.
Solution: The function eeAckPoll() will poll the EEPROM until it is not busy.
void eeAckPoll(char ID)
{
SendSlaveID(ID);
while(IBSR & RXAK){
IBCR | 5 RSTA;
/* generate a restart condition */
IBDR 5 ID;
/* send out EEPROM ID */
while(!(IBSR & IBIF));
IBSR 5 IBIF;
/* clear the IBIF flag */
} ;
/* continue if EEPROM did not acknowledge */
IBCR & 5 , MSSL;
/* generate a stop condition 2 indispensable */
}
11.9 Summary
The I 2 C protocol is an alternative to the SPI serial interface protocol. Compared with the
SPI protocol, the I 2 C bus offers the following advantages:
No chip-enable or chip-select signal for selecting slave devices
Allows multiple master devices to coexist in a system because it provides easy bus
arbitration
 
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