Inter-Integrated Circuit (I2C) Interface - The HCS12/9S12: An Introduction to Software and Hardware Interfacing - page 570

5 V 5 V

HCS12 MCU

DS1631A

2.2 k Ω 2.2 k Ω 5 V

V DD

SDA SDA

SCL SCL A0

∙∙∙∙ other I 2 C slaves

IRQ T OUT

A1

GND A2

SCL

SDA

Figure 11.34 ■ Typical circuit connection between the HCS12 MCU and DS1631A

7 6 5 4 3 2 1 0

1 0 0 1 A 2 A 1 A 0 R/W

Figure 11.35 ■ Control byte for DS1631A

W RITE D ATA TO DS1631A
The master can write data to the DS1631A by issuing an Access Config , Access TH , or
Access TL command following the control byte. Since the R/W bit in the control byte was a 0,
the DS1631A is already prepared to receive data. Therefore, after receiving an ACK in response
to the command byte, the master device can immediately begin transmitting data. When writ-
ing to the Config register, the master must send 1 byte of data, and when writing to the T H or
T L register, the master must send 2 bytes of data. The upper byte is written first followed by the
lower byte. After receiving each data byte, the DS1631A responds with an ACK, and the trans-
action is finished with a stop from the master.

R EAD D ATA FROM DS1631A
The master can read data from the DS1631A by issuing an Access Config , Access TH ,
Access TL , or Read Temperature command following the control byte. After receiving an ACK
in response to the command, the master must generate a Restart condition followed by a con-
trol byte with the same slave ID as the first control byte. However, this time the R/W bit must
be set to 1 to inform the DS1631A that a read is being performed. After sending an ACK in
response to this control byte, the DS1631A begins transmitting the requested data on the next
clock cycle. One byte of data will be transmitted when reading from the configuration register,
after which the master must respond with a NACK followed by a stop condition. For 2-byte
reads (i.e., from the Temperature, T H , or T L register), the master must respond to the first data
byte with an ACK and to the second byte with a NACK followed by a stop condition. The upper
byte is read first followed by the lower byte. If only the most significant byte of data is needed,
the master can issue a NACK followed by a stop condition after reading the first data byte.