Hardware Reference
In-Depth Information
Example 1.2
▼
Write an instruction sequence to add the byte pointed to by index register X and the follow-
ing byte and place the sum at the memory location pointed to by index register Y.
Solution:
The byte pointed to by index register X and the following byte can be accessed by using
the indexed addressing mode.
ldaa
0,X
; put the byte pointed to by X in A
adda
1,X
; add the following byte to A
staa
0,Y
; store the sum at the location pointed to by Y
▲
Example 1.3
▼
Write an instruction sequence to add the numbers stored at $1000 and $1001 and store the
sum at $1004.
Solution:
To add these two numbers, we need to put one of them in an accumulator.
ldaa
$1000
; copy the number stored in memory location at $1000 to A
adda
$1001
; add the second number to A
staa
$1004
; save the sum at memory location at $1004
▲
Example 1.4
▼
Write an instruction sequence to swap the 2 bytes at $100 and $200.
Solution:
To swap the 2 bytes, we need to make a copy of one of the 2 bytes and then the swap-
ping can proceed.
ldaa
$100
; make a copy of m[$100] in A
movb
$200,$100
; store [$200] in m[$100]
staa
$200
; store the original [$100] in m[$200]
▲
The HCS12 uses a three-stage instruction queue to facilitate instruction fetching and
increase execution speed. Queue logic prefetches program information and positions it for
sequential execution, one instruction at a time. The relationship between bus cycles and
execution cycles is straightforward and facilitates tracking and debugging.
There are three 16-bit stages in the instruction queue. Instructions enter the queue at stage
1 and roll out after stage 3. Each byte in the queue is selectable. An opcode-prediction algorithm
determines the location of the next opcode in the instruction queue.
Each instruction refills the queue by fetching the same number of bytes that the instruc-
tion uses. Program information is fetched in aligned 16-bit words. Each program fetch indicates
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