Hardware Reference
In-Depth Information
of the first byte is the R/W bit that determines the direction of the message. A 0 in the least sig-
nificant bit of the first byte means that the master will write information to the selected slave.
A 1 in this position indicates that the master will read information from the selected slave.
F
ORMATS
WITH
10-
BIT
A
DDRESS
The following data formats are possible in 10-bit addressing:
•
Master transmitter transmits to slave receiver with a 10-bit slave address
. The
transfer direction is not changed (see Figure 11.16). When a 10-bit address follows
a start condition, each slave compares the first 7 bits of the first byte of the slave
address (11110xx) with its own address and tests if the eighth bit is 0. It is possible
that more than one device will find a match and generate an acknowledgement
(A1). All slaves that find a match will compare the 8 bits of the second byte of the
slave address with their own addresses, but only one slave will find a match and
generate an acknowledgement (A2). The matching slave will remain addressed by
the master until it receives a stop condition or a repeated start condition followed
by a different slave address.
11110XX
0
Slave address
1st 7 bits
Slave address
2nd byte
S
A1
A2
A
data
P
R/W
data
A/A
(write)
Figure 11.16
■
A master transmitter addresses a slave receiver with a 10-bit address
•
Master
receiver reads slave transmitter with a 10-bit address
. The transfer
direction is changed after the second R/W bit (see Figure 11.17). Up to and including
the acknowledgement bit A2, the procedure is the same as that described for a
master transmitter addressing a slave receiver. After the repeated start condition,
a matching slave remembers that it was addressed before. This slave then checks
if the first 7 bits of the first byte of the slave address following repeated start (R)
are the same as they were after the start condition (S), and tests if the eighth
(R/W) bit is 1. If there is a match, the slave considers that it has been addressed as
a transmitter and generates acknowledgement bit A3. The slave transmitter remains
addressed until it receives a stop condition (P) or until it receives another repeated
start (R) condition followed by a different slave address. After a repeated start (R)
condition, all other slave devices will also compare the first 7 bits of the first byte
of the slave address (11110xx) with their own addresses and test the eighth bit.
0
1
11110XX
11110XX
Slave address
1st 7 bits
Slave address
2nd byte
Slave address
1st 7 bits
S
R/W
A1
A2
R
R/W
A3
data
A
data
P
A
(write)
(read)
Figure 11.17
■
A master receiver addresses a slave transmitter with a 10-bit address
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