Inter-Integrated Circuit (I2C) Interface - The HCS12/9S12: An Introduction to Software and Hardware Interfacing - page 537

Slave
Address

R/W Bit Description

0000 000
0000 000
0000 001
0000 010
0000 011
0000 1xx
1111 1xx
1111 0xx

0
1
x
x
x
x
x
x

General call address
Start byte 1
CBUS address 2
Reserved for different bus format 3
Reserved for future purpose
Hs-mode master code
Reserved for future purposes
10-bit slave addressing

1 No device is allowed to acknowledge at the reception of the
start byte.
2 The CBUS address has been reserved to enable the inter-mixing
of CBUS compatible and I 2 C-bus compatible devices in the same
system. I 2 C-bus compatible devices are not allowed to respond
on reception of this address.
3 The address reserved for a different bus format is included
to enable I 2 C and other protocols to be mixed. Only I 2 C-bus
compatible devices that can work with such formats and
protocols are allowed to respond to this address.

Table 11.1 ■ Definition of bits in the first byte

call address, it will acknowledge this address and behave as a slave receiver. The second and fol-
lowing bytes will be acknowledged by every slave receiver capable of handling this data. A slave
that cannot process one of these bytes must ignore it by not acknowledging. The meaning of
the general call address is always specified in the second byte, as shown in Figure 11.14.

LSB

0 0 0 0 0000AXXXXXXXBA

First byte
(general call address)

Second byte

Figure 11.14 ■ General call address format

When bit B in Figure 11.14 is 0, the second byte has the following definitions:
• 00000110 (0x06)— reset and write programmable part of slave address by
hardware . On receiving this 2-byte sequence, all devices designed to respond to the
general call address will reset and take in the programmable part of their address.
Precautions have to be taken to ensure that a device is not pulling down the
SDA or SCL line after applying the supply voltage, since these low levels would
block the bus.
• 00000100 (0x04)—w rite programmable part of slave address by hardware . All
devices that define the programmable part of their addresses by hardware will latch