Inter-Integrated Circuit (I2C) Interface - The HCS12/9S12: An Introduction to Software and Hardware Interfacing - page 536

S Slave address A Data A Data P

R/W A

Data transferred
( n bytes + acknowledge)

1 (read)

Figure 11.11 ■ A master reads a slave immediately after the first byte

S Slave address A Data R Slave address Data P

R/W A/A R/W A A/A

bytes +
acknowledge)

( n bytes +

acknowledge)*

( n

Read or
write

Read or
write

Repeated
start

Direction of
transfer may
change at this
point

* Not shaded because
transfer direction of data
and acknowled ge bits
depends on R/W bits

Figure 11.12 ■ Combined format

11.2.7 7-Bit Addressing
The addressing procedure for the I 2 C bus is such that the first byte after the start condition
usually determines which slave will be selected by the master. The exception is the general call
address , which can address all devices. When this address is used, all devices should, in theory,
respond with an acknowledgement. However, devices can be made to ignore this address. The
second byte of the general call address then defines the action to be taken.
The first byte after the start condition carries the 7-bit address and the direction of the mes-
sage. The meaning of this byte is shown in Figure 11.13. When the least significant bit is 1, the
master device will read information from the selected slave. Otherwise, the master will write
information to a selected slave. When an address is sent, each device in a system compares the
first 7 bits after the start condition with its address. If they match, the device cons id ers itself
addressed by the master as a slave receiver or slave transmitter, depending on the R/W bit. The
I 2 C bus committee coordinates the allocation of I 2 C addresses. Two groups of eight addresses
(0000xxx and 1111xxx) are reserved for the special purpose and shown in Table 11.1. The bit
combination 11110xx of the slave address is reserved for 10-bit addressing.

MSB

LSB

R/W

Slave address

Figure 11.13 ■ The first byte after the start condition

G ENERAL C ALL A DDRESS
The general call address is for addressing every device connected to the I 2 C bus. However,
if a device does not need any of the data supplied within the general call structure, it can ignore
this address by not issuing an acknowledgement. If a device does require data from a general