Hardware Reference
In-Depth Information
When the MCU is in normal run mode, the SCI module performs normal operation.
When the MCU enters the
wait
mode, the SCI's operation depends on the state of the
SCISWAI bit in the SCI
x
CR1 register.
1. If the SCISWAI bit is 0, the SCI operates normally when the CPU is in
wait
mode.
2. If the SCISWAI bit is 1, the SCI clock generation ceases and the SCI module enters
a power-conservation state when the CPU is in
wait
mode. Setting the SCISWAI
bit does not affect the state of the receiver enable bit (RE) or the transmitter enable
bit (TE).
If the SCISWAI bit is set, any transmission or reception in progress stops at
wait
mode
entry. The transmission or reception resumes when either an internal or external interrupt
brings the CPU out of
wait
mode. Exiting
wait
mode by reset aborts any transmission or recep-
tion in progress and resets the SCI module.
When the MCU enters the
stop
mode, the SCI becomes inactive. The
stop
instruction
does not affect the SCI register states, but the SCI module clock will be disabled. The SCI
operation resumes from where it left off after an external interrupt brings the CPU out of
stop
mode. Exiting
stop
mode by reset aborts any transmission or reception in progress and
resets the SCI.
The SCI module will transmit data as fast as the baud rate allows. In some circumstances,
the software that is responsible for reading the data from the SCI
x
DRH/L register may not be
able to do so as fast as the data is being received. In this case, there is a need for the HCS12
MCU to tell the transmitting device to suspend transmission of data temporarily. Similarly, the
HCS12 MCU may need to be told to suspend transmission temporarily. This is done by means
of flow control. There are two common methods of flow control, XON/XOFF and hardware.
Here,
X
stands for
transmission.
The XON/XOFF flow control can be implemented completely in software with no exter-
nal hardware, but full-duplex communication is required. When incoming data need to be sus-
pended, an XOFF byte is transmitted back to the other device that is transmitting the data being
received. To start the other device transmitting again, an XON byte is transmitted. XON and
XOFF are standard ASCII control characters. This means that when sending raw data instead of
ASCII text, care must be taken to ensure that XON and XOFF characters are not accidentally
sent with the data. The ASCII codes of XON and XOFF are 0x11 and 0x13, respectively. The
XON character is called the Device Control 1 (DC1) character; the XOFF character is called the
Device Control 3 (DC3) character.
Hardware flow control uses extra signals to control the flow of data. To implement hard-
ware flow control on an HCS12 device, extra I/O pins must be used. Generally, an output pin
is controlled by the receiving device to indicate that the transmitting device should suspend
or resume transmissions. The transmitting device tests an input pin before a transmission to
determine whether data can be sent.
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