Hardware Reference
In-Depth Information
7
7
A
0
B
0
8-bit accumulator A and B
or
16-bit double accumulator D
15
D
0
15
X
0
Index register X
1
0
Y
Index register Y
1
SP
0
Stack pointer
15
PC
0
Program counter
SXH I NZVC
Condition code register H
Carry
Overflow
Zero
Negative
I Interrupt mask
Half-carry (from bit 3)
X Interrupt mask
Stop Disable
Figure 1.10 HCS12 CPU registers
Index registers X and Y. These two registers are used mainly in forming operand
addresses during the instruction execution process. However, they are also used in
several arithmetic operations.
Stack pointer (SP). A stack is a last-in-first-out data structure. The HCS12 has a 16-bit
stack pointer which points to the top byte of the stack (shown in Figure 1.11). The stack
grows toward lower addresses. The use of the stack will be discussed in Chapter 4.
Program counter. The 16-bit PC holds the address of the next instruction to be executed.
After the execution of an instruction, the PC is incremented by the number of bytes of
the executed instruction.
Condition code register (CCR). This 8-bit register is used to keep track of the pro-
gram execution status, control the execution of conditional instructions, and
enable/disable the interrupt handling. The contents of the CCR register are shown
in Figure 1.10. The function of each condition code bit will be explained in later
sections and chapters.
The HCS12 supports the following types of data:
Bits
5-bit signed integers
8-bit signed and unsigned integers
8-bit, two-digit binary-coded-decimal (BCD) numbers
 
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