Hardware Reference
In-Depth Information
Timer clock (TIMCLK)
CLK1
CLK0
4:1 Mux
Prescaled clock
from timer
Clock select
(PAMOD)
Edge
detector
PT7
Interrupt
8-bit PAC3
(PACN3)
8-bit PAC2
(PACN2)
MUX
PACA
÷ 64
Bus clock
Interrupt
8-bit PAC1
(PACN1)
8-bit PAC0
(PACN0)
Delay counter
PACB
Edge detector
PT0
Figure 8.26 16-bit accumulator block diagram
8.7.2 Operation Modes
The 16-bit pulse accumulator PACA has two operation modes.
1. Event-counting mode . In this mode, the PACA counter increments on the active edge of
the PT7 pin. Many microcontroller applications involve counting things. These things are
called events, but in real applications they might be anything: pieces on an assembly line,
cycles of an incoming signal, or units of time. To be counted by the accumulator, these
things must be translated into rising or falling edges on the PT7 pin. A trivial example of
an event might be to count pieces on the assembly line: a light emitter and detector pair
could be placed across a conveyor so that as each piece passes the sensor, the light beam is
interrupted and a logic-level signal that can be connected to the PT7 pin is produced.
2. Gated-time-accumulation mode . The 16-bit PACA counter is clocked by a free-
running E 4 64 signal, subject to the PT7 signal being active. One common use of this
mode is to measure the duration of a single pulse. The counter is set to 0 before the
pulse starts, and the resultant pulse time is read directly when the pulse is finished.
The 16-bit pulse accumulator B and all four 8-bit pulse accumulators have only one mode:
event counting. That is, their counters are incremented on the active edge of their associated
pins. The active edges of PACB and PAC3, . . . , PACO0 are identical to those of timer capture
functions IC0 (PT0 pin) and IC3, . . . , ICO (PT3, . . . , PTO pins), respectively. The active edges
of the PT3,PT0 pins are defined by the TCTL4 register.
8.7.3 Interrupt Sources
The 16-bit PACA has two interrupt sources.
1. PT7-edge interrupt
2. PACA counter overflow
 
 
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