Hardware Reference
In-Depth Information
8.6.1 Operation of the Output-Compare Function
One of the major applications of an output-compare function is performing an action at a
specific time in the future (when the 16-bit timer counter reaches a specific value). The action
might be to toggle a signal, turn on a switch, turn off a valve, and so on. To use an output-
compare function, the user
1. Makes a copy of the current contents of the TCNT register
2. Adds to this copy a value that can generate the desired delay
3. Stores the sum into an output-compare register (TC x )
The delay value to be added is dependent on the prescaler to TCNT. The prescaler needs to be set
before the delay value is chosen. The user has the option of specifying the action to be activated on
the selected output-compare pin by programming the TCTL1 and TCTL2 registers. The compara-
tor compares the value of the TCNT and that of the specifi ed output-compare register (TC x ) in
every clock cycle (the clock input to TCNT). If they are equal, the specifi ed action on the output-
compare pin is activated and the associated status bit in TFLG1 is set to 1. An interrupt request is
generated if it is enabled. The 16-bit output-compare register can be read and written any time.
8.6.2 Registers Related to the Output-Compare Function
The actions that can be activated on an output-compare pin are
Pull up to high
Pull down to low
Toggle
The action of an OC pin can be selected by programming the TCTL1 and TCTL2 registers as
shown in Figure 8.18. When either OM n or OL n is 1, the pin associated with OC n becomes an
output tied to OC n regardless of the state of the associated DDRT bit.
7
6
5
4
3
2
1
0
OM7
OL7
OM6
OL6
OM5
OL5
OM4
OL4
Reset:
0
0
0
0
0
0
0
0
(a) TCTL1 register
6
5
3
2
1
0
7
4
OM3
OL3
OM2
OL2
OM1
OL1
OM0
OL0
Reset:
0
0
0
0
0
0
0
0
(b) TCTL2 register
Read: anytime
Write: anytime
OM
n
OL
n
: output level (
n
= 0, . . . , 7)
0
0
No action (timer disconnected from output pin)
0
1
Toggle PT
n
pin
1
0
Clear PT n pin to 0
1
1
Set PT
n
pin to high
Figure 8.18 Timer Control registers 1 and 2 (TCTL1 and TCTL2)
 
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