Timer Functions - The HCS12/9S12: An Introduction to Software and Hardware Interfacing - page 377

TCTL4 5 0x01; // prepare to capture the rising edge

TFLG1 5 C0F; // clear C0F flag

while(!(TFLG1 & C0F)); // wait for the arrival of the rising edge

TFLG2 5 0x80; // clear TOF flag

TSCR2 | 5 0x80; // enable TCNT overflow interrupt

asm(“cli”);

edge1 5 TC0; // save the first edge

TCTL4 5 0x02; // prepare to capture the falling edge

while (!(TFLG1 & C0F)); // wait for the arrival of the falling edge

diff 5 TC0 2 edge1;

if (TC0 < edge1)

overflow 25 1;

pulse_width 5 (long)overflow * 65536u 1 (long)diff;

while (1);

}
interrupt void tovisr(void)
{

TFLG2 5 0x80; /* clear the TOF flag */

overflow 11 ;

}

The timer overflow vector is set up by using the following function:

extern void near tovisr(void);
#pragma CODE_SEG __NEAR_SEG NON_BANKED
#pragma CODE_SEG DEFAULT // Change code section to DEFAULT.

typedef void (*near tIsrFunc)(void);
const tIsrFunc _vect[] @0xFFDE 5 {

tovisr

};

The required modification for setting up an interrupt vector for the ICC12 C compiler is
similar to Example 6.6.

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8.6 Output-Compare Function

The HCS12 has eight output-compare channels. Each channel consists of
• A 16-bit comparator
• A 16-bit compare register TC x , x 5 0..7 (also used as input-capture register)
• An output action pin (PT x —can be pulled up to high, pulled down to low, or
toggled)
• An interrupt request circuit
• A forced-compared function (CFORC x )
• Control logic