Hardware Reference
In-Depth Information
8.4.3 Timer Interrupt Flag 2 Register (TFLG2)
Only bit 7 (TOF) of this register is implemented. When TCNT rolls over from $FFFF to
$0000, bit 7 of this register is set to 1. This flag can be cleared by writing a 1 to it.
8.5 Input-Capture Function
Some applications need to know the arrival time of events. In a computer, physical time is
represented by the count value in a counter, and the occurrence of an event is represented by a
signal edge (either the rising or falling edge). The time when an event occurs can be recorded by
latching the count value when a signal edge arrives, as illustrated in Figure 8.4.
Rising edge
Falling edge
or
Figure 8.4 Events presented by signal edges
The HCS12 timer system has eight input-capture channels that implement this operation.
Each input-capture channel includes a 16-bit input-capture register, an input pin, input edge-
detection logic, and an interrupt generation circuit. In the HCS12, physical time is represented
by the count in the TCNT.
8.5.1 Input-Capture/Output-Compare Selection
Since input-capture and output-compare functions share signal pins and registers, they can-
not be enabled simultaneously. When one is enabled, the other is disabled. The selection is done
by the Timer Input-Capture/Output-Compare Select register (TIOS), as shown in Figure 8.5.
7
6
5
4
3
2
1
0
IOS7
IOS6
IOS5
IOS4
IOS3
IOS2
IOS1
IOS0
Value
after reset
0
0
0
0
0
0
0
0
IOS[7:0]: input-capture or output-compare channel configuration bits
0 = the corresponding channel acts as an input-capture.
1 = the corresponding channel acts as an output-compare.
Figure 8.5 Timer Input-Capture/Output-Compare Select register (TIOS)
Example 8.1
Write an instruction sequence to enable the output-compare channels 7,4 and input-capture
channels 3,0.
Solution: The following instruction sequence will achieve the desired configuration:
#include
“c:\miniide\hcs12.inc”
. . .
movb
#$F0,TIOS
 
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