Hardware Reference
In-Depth Information
The timer module has a 16-bit pulse accumulator, which can be used to count the number
of events that have occurred or to measure the frequency of an unknown signal. The timer
module shares the use of Port T pins PT7,PT0. The signal pins IOC7,IOC0 correspond to
PT7,PT0. The 16-bit pulse accumulator shares the use of the PT7 pin. The PT7 pin is referred
to as the PAI pin when it is used as the pulse-accumulator input.
The timer counter register (TCNT), a 16-bit register, is required for the functioning of all
input-capture and output-compare functions. The user must access this register in one access
rather than two separate accesses, to its high byte and low byte. Because the TCNT does not
stop during the access operation, the value accessed in a 16-bit read won't be the same as two
separate accesses to its high byte and low byte.
There are three registers related to the operation of the TCNT. They are
1. Timer System Control register 1 (TSCR1)
2. Timer System Control register 2 (TSCR2)
3. Timer Interrupt Flag 2 register (TFLG2)
The contents of the TSCR1 register are shown in Figure 8.2. The timer counter must be
enabled before it can count. Setting bit 7 of the TSCR1 register enables the TCNT to count (up).
6
5
3
2
1
0
7
4
TEN
TSWAI
TSFRZ
TFFCA
0
0
0
0
Value
after reset
0
0
0
0
0
0
0
0
TEN: timer enable bit
0 = disables timer; this can be used to save power consumption.
1 = allows timer to function normally.
TSWAI: timer stop while in wait mode bit
0 = allows timer to continue running during wait mode.
1 = disables timer when MCU is in wait mode.
TSFRZ: timer and modulus counter stop while in freeze mode
0 = allows timer and modulus counter to continue running while in
freeze mode.
1 = disables timer and modulus counter when MCU is in freeze mode.
TFFCA: timer fast flag clear all bits
0 = allows timer flag clearing to function normally.
1 = for TFLG1, a read from an input-capture or a write to
the output-compare channel causes the corresponding channel
flag, CnF, to be cleared. For TFLG2, any access to the TCNT
register clears the TOF flag. Any access to the PACN3 and
PACN2 registers clears the PAOVF and PAIF flags in the PAFLG
register. Any access to the PACN1 and PACN0 registers clears the
PBOVF flag in the PBFLG register.
Figure 8.2
■
Timer System Control register 1 (TSCR1)
Search WWH ::
Custom Search