Advanced Parallel I/O - The HCS12/9S12: An Introduction to Software and Hardware Interfacing - page 311

PT0/IOC0

PT1/IOC1

PT2/IOC2

PT3/IOC3

PT4/IOC4

PT5/IOC5

PT6/IOC6

PT7/IOC7

Figure 7.10 ■ Port T pins and their alternate functions

The pin functions of Port T are shown in Figure 7.10. In addition to being used as general
I/O pins, Port T pins can also be used as input capture or output compare action pins.
7.5.5 Port S
Port S has a Port S Wired-OR Mode register (WOMS) in addition to all the registers associated
with Port T (PTS, DDRS, PTIS, RDRS, PERS, and PPSS). Each bit of this register configures the
associated output pin as wired-OR. The contents of this register are shown in Figure 7.11. The con-
tents of PTIS, RDRS, PERS, and PPSS are identical to those of PTIT, RDRT, PERT, and PPST, respec-
tively. As shown in Figure 7.12, Port S pins can be used as general I/O pins or serial interface signals.

7 6 5 4 3 2 1 0

Reset value
= 0x00

WOMS7 WOMS6 WOMS5 WOMS4 WOMS3 WOMS2 WOMS1 WOMS0

WOMS[7:0]: wired-OR mode Port S
0 = output buffers operate as push-pull outputs.
1 = output buffers operate as open-drain outputs.

Figure 7.11 ■ Port S wired-OR mode register (WOMS)

PS0/RXD0
PS1/TXD0

PS2/RXD1

PS3/TXD1

PS4/MISO0

PS5/MOSI0

PS6/SCK0

PS7/SS0

Figure 7.12 ■ Port S pins and their alternate functions