Hardware Reference
In-Depth Information
MODE R
EGISTER
This register establishes the operation mode and other miscellaneous functions (i.e., internal
visibility and emulation of Ports E and K). The contents of this register are shown in Figure 7.3.
7
6
5
4
3
2
1
0
MODC
MODB
MODA
0
IVIS
0
EMK
EME
MODC, MODB, MODA: mode select bits
000 = special single-chip mode
001 = emulation narrow mode
010 = special test mode
011 = emulation wide mode
100 = normal single-chip mode
101 = normal expanded narrow mode (external memory data bus is 8-bit)
110 = special peripheral mode
111 = normal expanded wide mode (external memory data bus is 16-bit)
IVIS: internal visibility
0 = no visibility of internal bus operations on external bus.
1 = internal bus operations are visible on external bus.
EMK: emulate Port K
0 = PTK and DDRK are in memory map and port K can be used in general I/O.
1 = If in any expanded mode, PTK and DDRK are removed from memory map.
EME: emulate Port E
0 = PTE and DDRE are in the memory map so Port E can be used for general I/O.
1 = If in any expanded mode or special peripheral mode, PTE and DDRE are
removed from memory map, which allows the user to emulate the function
of these registers externalIy.
Figure 7.3
■
The MODE register
P
ULL
-U
P
C
ONTROL
R
EGISTER
(PUCR)
This register is used to select the pull-up resistors for the pins associated with the core part.
The MC9S12DG256 has Ports A, B, E, and K in its core part. This register can be written any
time; its contents are shown in Figure 7.4.
7
6
5
4
3
2
1
0
Reset value
= 0x90
PUPKE
0
0 PUPEE
0
0
PUPBE
PUPAE
PUPKE: Pull-up Port K enable
0 = pull-up resistors of Port K are disabled.
1 = pull-up resistors of Port K are enabled.
PUPEE: pull-up Port E enable
0 = pull-up resistors of Port E input pins 7 and 4-0 are disabled.
1 = pull-up resistors of Port E input pins 7 and 4-0 are enabled.
PUPBE: Pull-up Port B enable
0 = pull-up resistors of Port B are disabled.
1 = pull-up resistors of Port B are enabled.
PUPAE: Pull-up Port A enable
0 = pull-up resistors of Port A are disabled.
1 = pull-up resistors of Port A are enabled.
Figure 7.4
■
Pull-Up Control register (PUCR)
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